Avago demonstrates 32G SerDes performance in 28nm CMOS

Frank Ostojic, vice president and general manager of the ASIC/ASSP Products Division at Avago, says: "Avago has now shipped over 350 million embedded SerDes channels in high performance ASICs and ASSPs. With our latest SerDes milestone, Avago continues to provide early access to IP that enables the development of products that meet today's requirements for ever increasing bandwidth."

Jag Bolaria, senior analyst at The Linley Group, says: "By achieving 32G performance, Avago provides further evidence of the robustness of its SerDes technology. Standards continue to evolve in response to the demands for increased data rates at low power. Having demonstrated this level of performance now, Avago is prepared to address future specifications."

Avago Intellectual Property (IP) SerDes cores can be easily integrated due to their modular, multi-rate architecture, and Avago has integrated over 400 SerDes channels on a single ASIC. The 28nm Avago SerDes cores feature a decision feedback equalisation (DFE) architecture, resulting in a number of key performance differentiators such as low overall power, best-in-class data latency, and best-in-class jitter and crosstalk tolerance.

Avago's broad Avago SerDes portfolio supports a wide range of industry specifications such as PCI Express, Fibre Channel, XAUI, CEI, 10GBASE-KR, SFI, and IEEE 802.3ba, thus providing the flexibility to address optical, copper and backplane applications.

Samples and production quantities are available now through Avago's direct sales channel and worldwide distribution partners. More information about Avago 's products and the 28nm Serializer/Deserializer (SerDes) core can be found at www.avagotech.com.